Model No.︰PE2G4BPFI35
Brand Name︰silicom
Country of Origin︰Israel
Unit Price︰CNY ¥ 18000 / pc
Minimum Order︰1 pc
Bypass / Disconnect: |
|
Bypass / Disconnect Ethernet ports on Power Fail, System Hangs or Software Application Hangs |
• |
Software programmable Bypass, Disconnect or Normal Mode |
• |
On Board Watch Dog Timer (WDT) Controller |
• |
Software programmable time out interval |
• |
Software Programmable WDT Enable / Disable counter |
• |
Software programmable Bypass Capability Enable / Disable |
• |
Software Programmable Disconnect Capability Enable / Disable |
• |
Software Programmable mode (Bypass, Normal or Disconnect mode) at Power up |
• |
Software Programmable mode (Bypass, Normal mode) at Power off |
• |
Independent Bypass operation in every two ports |
• |
Emulates standard NIC |
• |
|
|
Performance Features: |
|
16 Transmit and Receive queues per port |
• |
Up to 16 queues of Receive Side Scaling (RSS) minimize CPU utilization across multiple processor systems |
• |
Support for 8 pools of virtual machine Device Queues ( VMDq) per port |
• |
Support Direct Cache Access ( DCA) |
• |
Support Intel I/O AT 2.0 |
• |
TSO interleaving for reduced latency |
• |
UDP TSO |
• |
• Minimized device I/O interrupts using MSI and MSI-X |
|
• Offload of TCP / IP / UDP checksum calculation and TCP segmentation |
|
• SCTP receive and transmit checksum offload |
|
• Packet interrupt coalescing timers (packet timers) and absolute- delay interrupt timers for both transmit and receive operation |
|
|
|
Fiber Gigabit Ethernet 1000Base-SX: |
|
Independently Fiber Gigabit Ethernet channel/s support Gigabit Ethernet 1000Base-SX |
• |
Small Form Factor (SFF) LC Connectors |
• |
|
|
Fiber Gigabit Ethernet 1000Base-LX: |
|
Independently Fiber Gigabit Ethernet channel/s support Gigabit Ethernet 1000Base-LX |
• |
Small Form Factor (SFF) LC Connectors |
• |
|
|
Common Key features: |
|
Host Interface standard support PCI Express 1.1 |
• |
High performance, reliability, and low power use in Intel 82576 dual integrated MAC + PHY and SERDES chip controller |
• |
Ultra deep packet buffer per channel lowers CPU utilization |
• |
Hardware acceleration that can offload tasks from the host processor. The controllers can offload TCP/UDP/IP checksum calculations and TCP segmentation |
• |
Priority queuing – 802.1p layer 2 priority encoding |
• |
Virtual LANs –802.1q VLAN tagging |
• |
Jumbo Frame (9.5KB) |
• |
802.x flow control |
• |
PCI-SIG SR IOV (8 VF) |
• |
Multicast/ broadcast Packet replication |
• |
Statistics for SNMP |
• |
Supports Vital Product Data (VPD) |
• |
Integrated LinkSec security engines |
• |
Supports IEEE 1588 |
• |
LEDs indicators for link/Activity/Bypass/ Disconnect Mode status |